Currently, Z-planner imports and exports the HyperLynx format (.STK, .FFS), as well as IPC-2581 format and ODB++.
We’re working on interfaces to Keysight ADS, Simberian Simbeor, SiSoft, and Polar SpeedStack.
It’s amazing how many engineers simulate dozens of topologies in the pre-layout phase, and then thousands of signals post layout without knowing the exact dielectric thickness, dielectric constant (Dk) and dissipation factor (Df)—as a function of resin content and frequency—that the fabricator is going to use in production.
The Z-planner HyperLynx interface takes care of this problem, allowing you to bring in a legacy stackup from HyperLynx, or sending a correctly constructed stackup based on real material parameters to HyperLynx for simulation.
As shown in the screen shot on this page, just click on the Export to HyperLynx link, and your Z-planner stackup opens up in HyperLynx LineSim’s Stackup Editor.
IPC-2581, “Generic Requirements for Printed Board Assembly Products Manufacturing Description Data and Transfer Methodology,” was released in March 2004. The format, and the ecosystem that’s developed around it, enables accurate, vendor-neutral data exchange between designers and manufacturers of printed circuit boards (PCBs) and assemblies using an XML-based format.
Using Z-planner’s IPC-2581 interface, the software can exchange stackup data with Cadence Allegro, Zuken CR-5000, Polar Instruments SpeedStack, Downstream’s CAM350 and Blueprint, as well as a growing list of EDA tools that are adding IPC-2581 support over time.
Z-zero, based in
Redmond, Washington, develops
PCB stackup planning and
for electronic-system design.